Friday, April 23, 2010

VLSI Memory Layout Engineers @ Sway,Nodia 2+Exp

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Contact Person: mail cv to :  Sam
Contact #:
Note: Do not send any resumes which doesn't matches with requirement.It will get rejected.
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We have urgent job openings for the positions for Memory Layout Engineers with Minimum 2 yrs of relevant exp.

Experience :-
1.    Verification & Circuit Design of Memory & Memory blocks
2.    Understanding of SRAM/ROM architecture
3.    Understanding of key SRAM blocks viz. Sense Amplifiers, Row Decoders, IOs etc
4.    Knowledgeable in design rule analysis, parasitic extraction, noise & crosstalk issues, yield improvement and manufacturability issues and design for test principles   
5.    Understanding of semi-conductor design and manufacturing
6.    Proficient in DRC/LVS/parasitic extraction/Spice simulations
7.    Layout development and verification[DRC/LVS/ANT]
8.    Knowledge of design principles and practices

Note: Thanks to Sam Mathew for the e-mail about the requirement.
 

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